1. Field of the Invention
The present invention relates to a signal processor for processing plural signals and used for information storage devices, photoelectric converters, and the like.
2. Related Background Art
In image sensors and semiconductor memory devices, typically, read-only memories (ROMs), a X-Y address system configuration is employed, where a shift register performs a vertical scanning operation and a horizontal scanning operation to output sequentially chronological externally output signals from signal sources such as memory cells and photo cells.
An explanation will be given for an example of the conventional signal processor. FIG. 1 is a circuit diagram showing the conventional signal processor. FIG. 2 is a drive timing chart for the conventional signal processor.
Referring now to FIG. 1, signal sources S1, S2, S3, and S4 are typical photo cells each for outputting a voltage. The photo signals are chronologically outputted to the output line 5 via N-type MOS transistors M11, M12, . . . M14, M21, M22 . . . M24 acting as switching elements, and capacitance elements C11, C12 . . . C14 acting as signal holding means.
First, when a pulse applied to the terminal 1 rises up at the time t.sub.0, the photo signals for the cells M11 to M14 are read out and held in the capacitance elements C11 to C14, respectively. Then when the pulse applied to the terminal 1 falls down, the scanning circuit 11 starts to operate. A selection pulse is outputted to the signal line L1 at the time t.sub.2. At this time; the signal held in the capacitance element C11 is outputted to the terminal 12 via the signal line 5 and the output amplifier 10.
Then when the pulse on the signal line L1 falls down and the reset pulse is applied to the terminal 2 at the time t.sub.4, the output line 5 is reset to the reset reference potential of the terminal 3.
Similarly, the output operation and the reset operation are repeated for the remaining signal sources S2 to S4. The signals which are read out in parallel from the signal sources S1 to S4 and then held in the capacitance elements C11 to C14 are converted into time series signals.
In an actual signal processor, the signal sources are over 100 in number, and recently has become over 100 thousand in number.
Hence even if the reading time per signal source is short, there are limitations in reducing the time necessary to output signals from all signal sources as time series signals.
On the other hand, in many cases, when photo cells are used as the signal sources, the signals from the signal sources are outputted as visible images. For such images, the case may occur where a bright signal occupies only a very small region in one frame and a dark signal occupies the remaining region thereof, as when a match flames in the dark.
In such a case, the conventional signal processor performs necessary image signal processing by outputting all cell signals chronologically and then storing them in an external random access memory.
Hence the conventional processor is sufficient for general purpose devices. However, the processing rate cannot be improved because access to all cells causes unnecessary signal outputting time when a process is performed using only a partial signal.
This technical problem applies not only to the photo cells but also to sequential signal outputting devices.